OnOffDelay ​
On/off delay for a clocked signal.
The input u is interpreted as a signal that is on when u > threshold (and off when u < threshold). The output y is 1.0 when on and 0.0 when off. A change in the input is only propagated to the output after the input has held its new value continuously for delay time units; if the input reverts before delay elapses, the pending transition is cancelled.
The mode selects which transitions are delayed:
OnDelay:yturns ondelayafteruturns on, and turns off immediately whenuturns off.OffDelay:yturns offdelayafteruturns off, and turns on immediately whenuturns on.OnOffDelay: both the turn-on and turn-off transitions are delayed bydelay.
delay is effectively rounded up to the nearest sample.
The initial output state is selected through the initialization enum, using its scalar variants. The output is logical (0.0/1.0), so the requested level is taken as on when it exceeds 0.5:
InitialOutput(y0): the output starts on wheny0 > 0.5, otherwise off.InitialState(x0): sets the internal on/off memory directly (on whenx0 > 0.5); equivalent toInitialOutputfor this block.SteadyState: the output starts already settled to the current input (y = 1.0whenu > threshold), with no pending transition.
The array variants are not applicable to this scalar component and raise an error.
Usage ​
DiscreteComponents.OnOffDelay(delay=1.0, threshold=0.5)
Parameters: ​
| Name | Description | Units | Default value |
|---|---|---|---|
mode | Which edges are delayed: OnDelay delays the turn-on edge, OffDelay the turn-off edge, OnOffDelay both | – | DelayType.OnOffDelay() |
Ts | Sample time (defaults to SampleTime()) | – | SampleTime() |
initialization | Initial-condition specification (scalar variants InitialOutput/InitialState/SteadyState; array variants error) | – | DiscreteCom...t(; y0=0.0) |
delay | Delay time applied to the selected edge(s); effectively rounded up to the nearest sample | – | 1.0 |
threshold | Input level separating on (u > threshold) from off (u < threshold) | – | 0.5 |
Connectors ​
u- This connector represents a real signal as an input to a component (RealInput)y- This connector represents a real signal as an output from a component (RealOutput)
Variables ​
| Name | Description | Units |
|---|---|---|
s | Output on/off state | – |
timer | Time the input has opposed the current output state | – |
opp | True when the input opposes the current output (a transition is pending) | – |
Behavior ​
Behavior of this component cannot be rendered because it includes path variables.
Source ​
"""
On/off delay for a clocked signal.
The input `u` is interpreted as a signal that is *on* when `u > threshold` (and
*off* when `u < threshold`). The output `y` is `1.0` when on and `0.0` when off. A change
in the input is only propagated to the output after the input has held its new value
continuously for `delay` time units; if the input reverts before `delay` elapses, the
pending transition is cancelled.
The `mode` selects which transitions are delayed:
- `OnDelay`: `y` turns on `delay` after `u` turns on, and turns off immediately when `u` turns off.
- `OffDelay`: `y` turns off `delay` after `u` turns off, and turns on immediately when `u` turns on.
- `OnOffDelay`: both the turn-on and turn-off transitions are delayed by `delay`.
`delay` is effectively rounded up to the nearest sample.
The initial output state is selected through the `initialization` enum, using its
scalar variants. The output is logical (`0.0`/`1.0`), so the requested level is taken
as *on* when it exceeds `0.5`:
- `InitialOutput(y0)`: the output starts *on* when `y0 > 0.5`, otherwise *off*.
- `InitialState(x0)`: sets the internal on/off memory directly (*on* when `x0 > 0.5`);
equivalent to `InitialOutput` for this block.
- `SteadyState`: the output starts already settled to the current input (`y = 1.0` when
`u > threshold`), with no pending transition.
The array variants are not applicable to this scalar component and raise an error.
"""
component OnOffDelay@[input clk extends Discrete]
"Input signal (on when u > threshold)"
u = RealInput@[clk]() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": -50, "y1": 450, "x2": 50, "y2": 550, "rot": 0}
},
"tags": []
}
}
"Delayed output signal (1 = on, 0 = off)"
y = RealOutput@[clk]() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 960, "y1": 450, "x2": 1060, "y2": 550, "rot": 0}
},
"tags": []
}
}
"Which edges are delayed: OnDelay delays the turn-on edge, OffDelay the turn-off edge, OnOffDelay both"
structural parameter mode::DelayType = DelayType.OnOffDelay()
"Sample time (defaults to SampleTime())"
structural parameter Ts::Real = SampleTime()
"Delay time applied to the selected edge(s); effectively rounded up to the nearest sample"
parameter delay::Real = 1.0
"Input level separating on (u > threshold) from off (u < threshold)"
parameter threshold::Real = 0.5
"Initial-condition specification (scalar variants InitialOutput/InitialState/SteadyState; array variants error)"
structural parameter initialization::InitialCondition = DiscreteComponents.InitialCondition.InitialOutput(y0 = 0.0)
"Output on/off state"
variable s::Boolean
"Time the input has opposed the current output state"
variable timer::Real
"True when the input opposes the current output (a transition is pending)"
variable opp::Boolean
relations
y = ifelse(s, 1.0, 0.0)
initial timer@(clk-1) = 0.0
switch initialization
case InitialOutput
initial s@(clk-1) = initialization.y0 > 0.5
case InitialState
initial s@(clk-1) = initialization.x0 > 0.5
case SteadyState
initial s@(clk-1) = u@clk > threshold
case InitialOutputArray
initial s@(clk-1) = error("InitialOutputArray is not supported for OnOffDelay; use InitialOutput, InitialState, or SteadyState")
case InitialStateArray
initial s@(clk-1) = error("InitialStateArray is not supported for OnOffDelay; use InitialOutput, InitialState, or SteadyState")
end
opp@clk = ifelse(s@(clk-1), u@clk < threshold, u@clk > threshold)
timer@clk = ifelse(opp@clk, timer@(clk-1) + Ts, 0.0)
# Flip the output to match the input once the input has opposed it for the
# mode-dependent delay: the on edge waits `delay`, the off edge is immediate,
# or vice versa; both wait `delay` for OnOffDelay.
switch mode
case OnDelay
s@clk = ifelse(opp@clk, ifelse(timer@clk >= ifelse(s@(clk-1), 0.0, delay), u@clk > threshold, s@(clk-1)), s@(clk-1))
case OffDelay
s@clk = ifelse(opp@clk, ifelse(timer@clk >= ifelse(s@(clk-1), delay, 0.0), u@clk > threshold, s@(clk-1)), s@(clk-1))
case OnOffDelay
s@clk = ifelse(opp@clk, ifelse(timer@clk >= delay, u@clk > threshold, s@(clk-1)), s@(clk-1))
end
metadata {
"Dyad": {
"icons": {"default": "dyad://DiscreteComponents/OnOffDelay.svg"},
"doc": {"behavior": false}
}
}
endFlattened Source
"""
On/off delay for a clocked signal.
The input `u` is interpreted as a signal that is *on* when `u > threshold` (and
*off* when `u < threshold`). The output `y` is `1.0` when on and `0.0` when off. A change
in the input is only propagated to the output after the input has held its new value
continuously for `delay` time units; if the input reverts before `delay` elapses, the
pending transition is cancelled.
The `mode` selects which transitions are delayed:
- `OnDelay`: `y` turns on `delay` after `u` turns on, and turns off immediately when `u` turns off.
- `OffDelay`: `y` turns off `delay` after `u` turns off, and turns on immediately when `u` turns on.
- `OnOffDelay`: both the turn-on and turn-off transitions are delayed by `delay`.
`delay` is effectively rounded up to the nearest sample.
The initial output state is selected through the `initialization` enum, using its
scalar variants. The output is logical (`0.0`/`1.0`), so the requested level is taken
as *on* when it exceeds `0.5`:
- `InitialOutput(y0)`: the output starts *on* when `y0 > 0.5`, otherwise *off*.
- `InitialState(x0)`: sets the internal on/off memory directly (*on* when `x0 > 0.5`);
equivalent to `InitialOutput` for this block.
- `SteadyState`: the output starts already settled to the current input (`y = 1.0` when
`u > threshold`), with no pending transition.
The array variants are not applicable to this scalar component and raise an error.
"""
component OnOffDelay
"Input signal (on when u > threshold)"
u = RealInput@[clk]() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": -50, "y1": 450, "x2": 50, "y2": 550, "rot": 0}
},
"tags": []
}
}
"Delayed output signal (1 = on, 0 = off)"
y = RealOutput@[clk]() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 960, "y1": 450, "x2": 1060, "y2": 550, "rot": 0}
},
"tags": []
}
}
"Which edges are delayed: OnDelay delays the turn-on edge, OffDelay the turn-off edge, OnOffDelay both"
structural parameter mode::DelayType = DelayType.OnOffDelay()
"Sample time (defaults to SampleTime())"
structural parameter Ts::Real = SampleTime()
"Delay time applied to the selected edge(s); effectively rounded up to the nearest sample"
parameter delay::Real = 1.0
"Input level separating on (u > threshold) from off (u < threshold)"
parameter threshold::Real = 0.5
"Initial-condition specification (scalar variants InitialOutput/InitialState/SteadyState; array variants error)"
structural parameter initialization::InitialCondition = DiscreteComponents.InitialCondition.InitialOutput(y0 = 0.0)
"Output on/off state"
variable s::Boolean
"Time the input has opposed the current output state"
variable timer::Real
"True when the input opposes the current output (a transition is pending)"
variable opp::Boolean
relations
y = ifelse(s, 1.0, 0.0)
initial timer@(clk-1) = 0.0
switch initialization
case InitialOutput
initial s@(clk-1) = initialization.y0 > 0.5
case InitialState
initial s@(clk-1) = initialization.x0 > 0.5
case SteadyState
initial s@(clk-1) = u@clk > threshold
case InitialOutputArray
initial s@(clk-1) = error("InitialOutputArray is not supported for OnOffDelay; use InitialOutput, InitialState, or SteadyState")
case InitialStateArray
initial s@(clk-1) = error("InitialStateArray is not supported for OnOffDelay; use InitialOutput, InitialState, or SteadyState")
end
opp@clk = ifelse(s@(clk-1), u@clk < threshold, u@clk > threshold)
timer@clk = ifelse(opp@clk, timer@(clk-1) + Ts, 0.0)
# Flip the output to match the input once the input has opposed it for the
# mode-dependent delay: the on edge waits `delay`, the off edge is immediate,
# or vice versa; both wait `delay` for OnOffDelay.
switch mode
case OnDelay
s@clk = ifelse(opp@clk, ifelse(timer@clk >= ifelse(s@(clk-1), 0.0, delay), u@clk > threshold, s@(clk-1)), s@(clk-1))
case OffDelay
s@clk = ifelse(opp@clk, ifelse(timer@clk >= ifelse(s@(clk-1), delay, 0.0), u@clk > threshold, s@(clk-1)), s@(clk-1))
case OnOffDelay
s@clk = ifelse(opp@clk, ifelse(timer@clk >= delay, u@clk > threshold, s@(clk-1)), s@(clk-1))
end
metadata {
"Dyad": {
"icons": {"default": "dyad://DiscreteComponents/OnOffDelay.svg"},
"doc": {"behavior": false}
}
}
endTest Cases ​
No test cases defined.
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