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Analog.Basic.Tests.VCV.md

Analog.Basic.Tests.VCV ​

Test circuit for VCV (voltage-controlled voltage source).

A sine voltage source (amplitude=1 V, frequency=1 Hz) drives the VCV input port (port 1). A 10 Ω resistor loads the output port (port 2). VCV gain = 2.

Expected (algebraic, holds for all t):

  • v1 = sin(2π·t)

  • v2 = gain·v1 = 2·sin(2π·t)

  • i1 = 0 (infinite input impedance)

  • i2 = −v2/R_load = −0.2·sin(2π·t)

Usage ​

ElectricalComponents.Analog.Basic.Tests.VCV()

Behavior ​

[connect(sine+y,vs+V)connect(vs+p,vcv+p1)connect(vs+n,gnd1+g)connect(vs+n,vcv+n1)connect(vcv+p2,rload+p)connect(rload+n,vcv+n2)connect(vcv+n2,gnd2+g)sine.y(t)=sine.offset+sine.amplitude⋅ifelse(t≥sine.starttime,sin⁡(sine.phase+6.283185307179586⋅sine.frequency⋅(−sine.starttime+t)),sin⁡(sine.phase))vs.v(t)=−vs.n.v(t)+vs.p.v(t)vs.i(t)=vs.p.i(t)vs.n.i(t)+vs.p.i(t)=0vs.v(t)=vs.uV⋅vs.V(t)vcv.v1(t)=−vcv.n1.v(t)+vcv.p1.v(t)vcv.v2(t)=vcv.p2.v(t)−vcv.n2.v(t)vcv.i1(t)=vcv.p1.i(t)vcv.i2(t)=vcv.p2.i(t)0=vcv.p1.i(t)+vcv.n1.i(t)0=vcv.n2.i(t)+vcv.p2.i(t)vcv.v2(t)=vcv.gain⋅vcv.v1(t)vcv.i1(t)=0rload.v(t)=−rload.n.v(t)+rload.p.v(t)rload.i(t)=rload.p.i(t)rload.n.i(t)+rload.p.i(t)=0rload.v(t)=rload.R⋅rload.i(t)gnd1.g.v(t)=0gnd2.g.v(t)=0]

Source ​

dyad
"""
Test circuit for VCV (voltage-controlled voltage source).

A sine voltage source (amplitude=1 V, frequency=1 Hz) drives the VCV input
port (port 1). A 10 Ω resistor loads the output port (port 2).
VCV gain = 2.

Expected (algebraic, holds for all t):
- v1 = sin(2π·t)
- v2 = gain·v1 = 2·sin(2π·t)
- i1 = 0  (infinite input impedance)
- i2 = −v2/R_load = −0.2·sin(2π·t)
"""
test component VCV
  "Sine signal: amplitude=1, frequency=1 Hz"
  sine = BlockComponents.Sources.Sine(amplitude = 1, frequency = 1) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 0, "y1": 310, "x2": 100, "y2": 410, "rot": 0}
      },
      "tags": []
    }
  }
  "Input voltage source"
  vs = ElectricalComponents.Analog.Sources.VoltageSource() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 160, "y1": 410, "x2": 260, "y2": 310, "rot": 90}
      },
      "tags": []
    }
  }
  "VCV with gain=2"
  vcv = ElectricalComponents.Analog.Basic.VCV(gain = 2) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 450, "y1": 320, "x2": 550, "y2": 420, "rot": 0}
      },
      "tags": []
    }
  }
  "Output load resistor"
  r_load = ElectricalComponents.Analog.Basic.Resistor(R = 10) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 730, "y1": 410, "x2": 830, "y2": 310, "rot": 90}
      },
      "tags": []
    }
  }
  "Input-side ground"
  gnd1 = ElectricalComponents.Analog.Basic.Ground() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 160, "y1": 580, "x2": 260, "y2": 680, "rot": 0}
      },
      "tags": []
    }
  }
  "Output-side ground"
  gnd2 = ElectricalComponents.Analog.Basic.Ground() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 520, "y1": 580, "x2": 620, "y2": 680, "rot": 0}
      },
      "tags": []
    }
  }
relations
  connect(sine.y, vs.V) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
  connect(vs.p, vcv.p1) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [{"x": 210, "y": 250}, {"x": 391, "y": 250}, {"x": 391, "y": 321}],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(vs.n, gnd1.g) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
  connect(vs.n, vcv.n1) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [
            {"x": 210, "y": 470},
            {"x": 390, "y": 470},
            {"x": 390, "y": 420},
            {"x": 451, "y": 420}
          ],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(vcv.p2, r_load.p) {
    "Dyad": {
      "edges": [{"S": 1, "M": [{"x": 551, "y": 250}, {"x": 780, "y": 250}], "E": 2}],
      "renderStyle": "standard"
    }
  }
  connect(r_load.n, vcv.n2) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [{"x": 780, "y": 470}, {"x": 571, "y": 470}, {"x": 571, "y": 420}],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(vcv.n2, gnd2.g) {
    "Dyad": {
      "edges": [{"S": 1, "M": [{"x": 570, "y": 420}], "E": 2}],
      "renderStyle": "standard"
    }
  }
metadata {
  "Dyad": {
    "icons": {"default": "dyad://ElectricalComponents/Example.svg"},
    "tests": {
      "case1": {"stop": 1, "expect": {"signals": ["vcv.v1", "vcv.v2", "vcv.i1", "vcv.i2"]}}
    }
  }
}
end
Flattened Source
dyad
"""
Test circuit for VCV (voltage-controlled voltage source).

A sine voltage source (amplitude=1 V, frequency=1 Hz) drives the VCV input
port (port 1). A 10 Ω resistor loads the output port (port 2).
VCV gain = 2.

Expected (algebraic, holds for all t):
- v1 = sin(2π·t)
- v2 = gain·v1 = 2·sin(2π·t)
- i1 = 0  (infinite input impedance)
- i2 = −v2/R_load = −0.2·sin(2π·t)
"""
test component VCV
  "Sine signal: amplitude=1, frequency=1 Hz"
  sine = BlockComponents.Sources.Sine(amplitude = 1, frequency = 1) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 0, "y1": 310, "x2": 100, "y2": 410, "rot": 0}
      },
      "tags": []
    }
  }
  "Input voltage source"
  vs = ElectricalComponents.Analog.Sources.VoltageSource() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 160, "y1": 410, "x2": 260, "y2": 310, "rot": 90}
      },
      "tags": []
    }
  }
  "VCV with gain=2"
  vcv = ElectricalComponents.Analog.Basic.VCV(gain = 2) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 450, "y1": 320, "x2": 550, "y2": 420, "rot": 0}
      },
      "tags": []
    }
  }
  "Output load resistor"
  r_load = ElectricalComponents.Analog.Basic.Resistor(R = 10) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 730, "y1": 410, "x2": 830, "y2": 310, "rot": 90}
      },
      "tags": []
    }
  }
  "Input-side ground"
  gnd1 = ElectricalComponents.Analog.Basic.Ground() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 160, "y1": 580, "x2": 260, "y2": 680, "rot": 0}
      },
      "tags": []
    }
  }
  "Output-side ground"
  gnd2 = ElectricalComponents.Analog.Basic.Ground() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 520, "y1": 580, "x2": 620, "y2": 680, "rot": 0}
      },
      "tags": []
    }
  }
relations
  connect(sine.y, vs.V) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
  connect(vs.p, vcv.p1) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [{"x": 210, "y": 250}, {"x": 391, "y": 250}, {"x": 391, "y": 321}],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(vs.n, gnd1.g) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
  connect(vs.n, vcv.n1) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [
            {"x": 210, "y": 470},
            {"x": 390, "y": 470},
            {"x": 390, "y": 420},
            {"x": 451, "y": 420}
          ],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(vcv.p2, r_load.p) {
    "Dyad": {
      "edges": [{"S": 1, "M": [{"x": 551, "y": 250}, {"x": 780, "y": 250}], "E": 2}],
      "renderStyle": "standard"
    }
  }
  connect(r_load.n, vcv.n2) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [{"x": 780, "y": 470}, {"x": 571, "y": 470}, {"x": 571, "y": 420}],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(vcv.n2, gnd2.g) {
    "Dyad": {
      "edges": [{"S": 1, "M": [{"x": 570, "y": 420}], "E": 2}],
      "renderStyle": "standard"
    }
  }
metadata {
  "Dyad": {
    "icons": {"default": "dyad://ElectricalComponents/Example.svg"},
    "tests": {
      "case1": {"stop": 1, "expect": {"signals": ["vcv.v1", "vcv.v2", "vcv.i1", "vcv.i2"]}}
    }
  }
}
end


Test Cases ​

Test Case case1 ​

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