Analog.Thyristor ​
This component extends from ConditionalHeatPort
Usage ​
TranslatedComponents.Analog.Thyristor(T=293.15, VDRM=100, VRRM=100, IDRM=0.1, VTM=1.7, IH=0.006, ITM=25, VGT=0.7, IGT=0.005, TON=1.0e-6, TOFF=1.5e-5, Vt=0.04, Nbv=0.74, vRef=0.65, Von=5, Voff=1.5, Ron=(VTM - 0.7) / ITM, Roff=(VDRM ^ 2) / VTM / IH)
Parameters: ​
| Name | Description | Units | Default value |
|---|---|---|---|
useHeatPort | – | false | |
T | K | 293.15 | |
VDRM | V | 100 | |
VRRM | V | 100 | |
IDRM | A | 0.1 | |
VTM | V | 1.7 | |
IH | A | 0.006 | |
ITM | A | 25 | |
VGT | V | 0.7 | |
IGT | A | 0.005 | |
TON | s | 0.000001 | |
TOFF | s | 0.000015 | |
Vt | V | 0.04 | |
Nbv | – | 0.74 | |
vRef | V | 0.65 | |
Von | V | 5 | |
Voff | V | 1.5 | |
Ron | Ω | (VTM - 0.7) / ITM | |
Roff | Ω | (VDRM ^ 2) / VTM / IH |
Connectors ​
heatPort- (HeatPort)Anode- This connector represents an electrical pin with voltage and current as the potential and flow variables, respectively. (Pin)Cathode- This connector represents an electrical pin with voltage and current as the potential and flow variables, respectively. (Pin)Gate- This connector represents an electrical pin with voltage and current as the potential and flow variables, respectively. (Pin)
Variables ​
| Name | Description | Units |
|---|---|---|
LossPower | W | |
T_heatPort | K | |
iGK | A | |
vGK | V | |
vAK | V | |
vControl | V | |
vContot | V | |
vConmain | V |
Behavior ​
Source ​
component Thyristor
extends ConditionalHeatPort
Anode = Pin()
Cathode = Pin()
Gate = Pin()
parameter VDRM::Dyad.Voltage(final min = 0) = 100
parameter VRRM::Dyad.Voltage(final min = 0) = 100
parameter IDRM::Dyad.Current = 0.1
parameter VTM::Dyad.Voltage = 1.7
parameter IH::Dyad.Current = 0.006
parameter ITM::Dyad.Current = 25
parameter VGT::Dyad.Voltage = 0.7
parameter IGT::Dyad.Current = 0.005
parameter TON::Dyad.Time = 1.0e-6
parameter TOFF::Dyad.Time = 1.5e-5
parameter Vt::Dyad.Voltage = 0.04
parameter Nbv::Real = 0.74
parameter vRef::Dyad.Voltage = 0.65
parameter Von::Dyad.Voltage = 5
parameter Voff::Dyad.Voltage = 1.5
parameter Ron::Dyad.Resistance = (VTM - 0.7) / ITM
parameter Roff::Dyad.Resistance = (VDRM ^ 2) / VTM / IH
variable iGK::Dyad.Current
variable vGK::Dyad.Voltage
variable vAK::Dyad.Voltage
variable vControl::Dyad.Voltage
variable vContot::Dyad.Voltage
variable vConmain::Dyad.Voltage
relations
Anode.i + Gate.i + Cathode.i = 0
vGK = Gate.v - Cathode.v
vAK = Anode.v - Cathode.v
iGK = Gate.i
vGK = vGK < vRef ? VGT / IGT * iGK : vRef ^ 2 / VGT + iGK * (VGT - vRef) / IGT
vContot = vConmain + (iGK < 0.95 * IGT ? 0 : (iGK < 0.95 * IGT + 1e-3 ? 10000 * (iGK - 0.95 * IGT) * vAK : 10 * vAK))
der(vControl) = (vContot - vControl) / ((vContot - vControl) > 0 ? 1.87 * TON : 0.638 * TOFF)
Anode.i = vAK < -VRRM ? -VRRM / Roff * exp(-(vAK + VRRM) / (Nbv * Vt)) : (vControl < Voff ? vAK / Roff : (vControl < Von ? vAK / (sqrt(Ron * Roff) * (Ron / Roff) ^ ((3 * ((2 * vControl - Von - Voff) / (2 * (Von - Voff))) - 4 * ((2 * vControl - Von - Voff) / (2 * (Von - Voff))) ^ 3) / 2)) : vAK / Ron))
vConmain = (Anode.i > IH or vAK > VDRM ? Von : 0)
LossPower = Anode.i * Anode.v + Cathode.i * Cathode.v + Gate.i * Gate.v
endFlattened Source
component Thyristor
heatPort = TranslatedComponents.HeatTransfer.HeatPort() if useHeatPort
structural parameter useHeatPort::Boolean = false
parameter T::Dyad.Temperature = 293.15
variable LossPower::Dyad.Power
variable T_heatPort::Dyad.Temperature
Anode = Pin()
Cathode = Pin()
Gate = Pin()
parameter VDRM::Dyad.Voltage(final min = 0) = 100
parameter VRRM::Dyad.Voltage(final min = 0) = 100
parameter IDRM::Dyad.Current = 0.1
parameter VTM::Dyad.Voltage = 1.7
parameter IH::Dyad.Current = 0.006
parameter ITM::Dyad.Current = 25
parameter VGT::Dyad.Voltage = 0.7
parameter IGT::Dyad.Current = 0.005
parameter TON::Dyad.Time = 1.0e-6
parameter TOFF::Dyad.Time = 1.5e-5
parameter Vt::Dyad.Voltage = 0.04
parameter Nbv::Real = 0.74
parameter vRef::Dyad.Voltage = 0.65
parameter Von::Dyad.Voltage = 5
parameter Voff::Dyad.Voltage = 1.5
parameter Ron::Dyad.Resistance = (VTM - 0.7) / ITM
parameter Roff::Dyad.Resistance = (VDRM ^ 2) / VTM / IH
variable iGK::Dyad.Current
variable vGK::Dyad.Voltage
variable vAK::Dyad.Voltage
variable vControl::Dyad.Voltage
variable vContot::Dyad.Voltage
variable vConmain::Dyad.Voltage
relations
if !(useHeatPort)
T_heatPort = T
else
initial heatPort.T = T_heatPort
initial heatPort.Q_flow = -LossPower
end
Anode.i + Gate.i + Cathode.i = 0
vGK = Gate.v - Cathode.v
vAK = Anode.v - Cathode.v
iGK = Gate.i
vGK = vGK < vRef ? VGT / IGT * iGK : vRef ^ 2 / VGT + iGK * (VGT - vRef) / IGT
vContot = vConmain + (iGK < 0.95 * IGT ? 0 : (iGK < 0.95 * IGT + 1e-3 ? 10000 * (iGK - 0.95 * IGT) * vAK : 10 * vAK))
der(vControl) = (vContot - vControl) / ((vContot - vControl) > 0 ? 1.87 * TON : 0.638 * TOFF)
Anode.i = vAK < -VRRM ? -VRRM / Roff * exp(-(vAK + VRRM) / (Nbv * Vt)) : (vControl < Voff ? vAK / Roff : (vControl < Von ? vAK / (sqrt(Ron * Roff) * (Ron / Roff) ^ ((3 * ((2 * vControl - Von - Voff) / (2 * (Von - Voff))) - 4 * ((2 * vControl - Von - Voff) / (2 * (Von - Voff))) ^ 3) / 2)) : vAK / Ron))
vConmain = (Anode.i > IH or vAK > VDRM ? Von : 0)
LossPower = Anode.i * Anode.v + Cathode.i * Cathode.v + Gate.i * Gate.v
metadata {}
endTest Cases ​
No test cases defined.
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