LIBRARY
Analog.Basic.Tests.VariableInductor
Test circuit for VariableInductor.
A sine voltage source (1 V, 1 Hz) drives an RL circuit where the inductance ramps from 0.1 H to 0.6 H over 2 s. A 10 Ω series resistor provides damping.
The flux-based formulation should produce smooth voltage despite the time-varying inductance.
Usage
ElectricalComponents.Analog.Basic.Tests.VariableInductor()
Behavior
julia
using ElectricalComponents #hide
using ModelingToolkit #hide
@named sys = ElectricalComponents.Analog.Basic.Tests.VariableInductor() #hide
full_equations(sys) #hide<< @example-block not executed in draft mode >>Source
dyad
"""
Test circuit for VariableInductor.
A sine voltage source (1 V, 1 Hz) drives an RL circuit where the
inductance ramps from 0.1 H to 0.6 H over 2 s. A 10 Ω series
resistor provides damping.
The flux-based formulation should produce smooth voltage despite
the time-varying inductance.
"""
test component VariableInductor
"Sine signal source: 1 V amplitude, 1 Hz"
sine = BlockComponents.Sources.Sine(amplitude = 1, frequency = 1) {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 40, "y1": 400, "x2": 140, "y2": 500, "rot": 0}
},
"tags": []
}
}
"Voltage source driven by the sine signal"
vs = ElectricalComponents.Analog.Sources.VoltageSource() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 250, "y1": 500, "x2": 350, "y2": 400, "rot": 90}
},
"tags": []
}
}
"Series resistor (10 Ω)"
R1 = ElectricalComponents.Analog.Basic.Resistor(R = 10) {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 450, "y1": 280, "x2": 550, "y2": 380, "rot": 0}
},
"tags": []
}
}
"Variable inductor under test"
vl = ElectricalComponents.Analog.Basic.VariableInductor() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 740, "y1": 500, "x2": 640, "y2": 400, "rot": 270}
},
"tags": []
}
}
"Ramp for inductance: 0.1 H to 0.6 H over 2 s"
ramp = BlockComponents.Sources.Ramp(height = 0.5, offset = 0.1, duration = 2) {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 950, "y1": 400, "x2": 850, "y2": 500, "rot": 0}
},
"tags": []
}
}
"Ground reference"
ground = ElectricalComponents.Analog.Basic.Ground() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 450, "y1": 600, "x2": 550, "y2": 700, "rot": 0}
},
"tags": []
}
}
relations
initial vl.i = 0
connect(sine.y, vs.V) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
connect(vs.p, R1.p) {
"Dyad": {
"edges": [{"S": 1, "M": [{"x": 300, "y": 330}], "E": 2}],
"renderStyle": "standard"
}
}
connect(R1.n, vl.p) {
"Dyad": {
"edges": [{"S": 1, "M": [{"x": 690, "y": 330}], "E": 2}],
"renderStyle": "standard"
}
}
connect(vl.n, ground.g) {
"Dyad": {
"edges": [{"S": 1, "M": [{"x": 690, "y": 540}, {"x": 500, "y": 540}], "E": 2}],
"renderStyle": "standard"
}
}
connect(vs.n, ground.g) {
"Dyad": {
"edges": [{"S": 1, "M": [{"x": 300, "y": 540}, {"x": 500, "y": 540}], "E": 2}],
"renderStyle": "standard"
}
}
connect(ramp.y, vl.L) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
metadata {
"Dyad": {
"tests": {
"case1": {
"stop": 1,
"atol": {"vl.v": 0.0001},
"expect": {"signals": ["vl.v", "vl.i", "vl.Psi"]}
}
}
}
}
endFlattened Source
dyad
"""
Test circuit for VariableInductor.
A sine voltage source (1 V, 1 Hz) drives an RL circuit where the
inductance ramps from 0.1 H to 0.6 H over 2 s. A 10 Ω series
resistor provides damping.
The flux-based formulation should produce smooth voltage despite
the time-varying inductance.
"""
test component VariableInductor
"Sine signal source: 1 V amplitude, 1 Hz"
sine = BlockComponents.Sources.Sine(amplitude = 1, frequency = 1) {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 40, "y1": 400, "x2": 140, "y2": 500, "rot": 0}
},
"tags": []
}
}
"Voltage source driven by the sine signal"
vs = ElectricalComponents.Analog.Sources.VoltageSource() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 250, "y1": 500, "x2": 350, "y2": 400, "rot": 90}
},
"tags": []
}
}
"Series resistor (10 Ω)"
R1 = ElectricalComponents.Analog.Basic.Resistor(R = 10) {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 450, "y1": 280, "x2": 550, "y2": 380, "rot": 0}
},
"tags": []
}
}
"Variable inductor under test"
vl = ElectricalComponents.Analog.Basic.VariableInductor() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 740, "y1": 500, "x2": 640, "y2": 400, "rot": 270}
},
"tags": []
}
}
"Ramp for inductance: 0.1 H to 0.6 H over 2 s"
ramp = BlockComponents.Sources.Ramp(height = 0.5, offset = 0.1, duration = 2) {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 950, "y1": 400, "x2": 850, "y2": 500, "rot": 0}
},
"tags": []
}
}
"Ground reference"
ground = ElectricalComponents.Analog.Basic.Ground() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 450, "y1": 600, "x2": 550, "y2": 700, "rot": 0}
},
"tags": []
}
}
relations
initial vl.i = 0
connect(sine.y, vs.V) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
connect(vs.p, R1.p) {
"Dyad": {
"edges": [{"S": 1, "M": [{"x": 300, "y": 330}], "E": 2}],
"renderStyle": "standard"
}
}
connect(R1.n, vl.p) {
"Dyad": {
"edges": [{"S": 1, "M": [{"x": 690, "y": 330}], "E": 2}],
"renderStyle": "standard"
}
}
connect(vl.n, ground.g) {
"Dyad": {
"edges": [{"S": 1, "M": [{"x": 690, "y": 540}, {"x": 500, "y": 540}], "E": 2}],
"renderStyle": "standard"
}
}
connect(vs.n, ground.g) {
"Dyad": {
"edges": [{"S": 1, "M": [{"x": 300, "y": 540}, {"x": 500, "y": 540}], "E": 2}],
"renderStyle": "standard"
}
}
connect(ramp.y, vl.L) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
metadata {
"Dyad": {
"tests": {
"case1": {
"stop": 1,
"atol": {"vl.v": 0.0001},
"expect": {"signals": ["vl.v", "vl.i", "vl.Psi"]}
}
}
}
}
endTest Cases
julia
using ElectricalComponents
using DyadInterface: TransientAnalysis, rebuild_sol, ODEAlg
using ModelingToolkit: toggle_namespacing, get_initial_conditions, @named
using CSV, DataFrames, Plots
snapshotsdir = joinpath(dirname(dirname(pathof(ElectricalComponents))), "test", "snapshots")<< @setup-block not executed in draft mode >>Test Case case1
julia
@named model_case1 = ElectricalComponents.Analog.Basic.Tests.VariableInductor()
model_case1 = toggle_namespacing(model_case1, false)
model_case1 = toggle_namespacing(model_case1, true)
result_case1 = TransientAnalysis(; model = model_case1, alg = ODEAlg.Auto(), start = 0e+0, stop = 1e+0, abstol=1e-6, reltol=1e-6)
sol_case1 = rebuild_sol(result_case1)<< @setup-block not executed in draft mode >>julia
df_case1 = DataFrame(:t => sol_case1[:t], :actual => sol_case1[model_case1.vl.v])
dfr_case1 = try CSV.read(joinpath(snapshotsdir, "ElectricalComponents.Analog.Basic.Tests.VariableInductor_case1_sig0.ref"), DataFrame); catch e; nothing; end
plt = plot(sol_case1, idxs=[model_case1.vl.v], width=2, label="Actual value of vl.v")
if !isnothing(dfr_case1)
scatter!(plt, dfr_case1.t, dfr_case1.expected, mc=:red, ms=3, label="Expected value of vl.v")
end<< @setup-block not executed in draft mode >>julia
plt<< @example-block not executed in draft mode >>julia
df_case1 = DataFrame(:t => sol_case1[:t], :actual => sol_case1[model_case1.vl.i])
dfr_case1 = try CSV.read(joinpath(snapshotsdir, "ElectricalComponents.Analog.Basic.Tests.VariableInductor_case1_sig1.ref"), DataFrame); catch e; nothing; end
plt = plot(sol_case1, idxs=[model_case1.vl.i], width=2, label="Actual value of vl.i")
if !isnothing(dfr_case1)
scatter!(plt, dfr_case1.t, dfr_case1.expected, mc=:red, ms=3, label="Expected value of vl.i")
end<< @setup-block not executed in draft mode >>julia
plt<< @example-block not executed in draft mode >>julia
df_case1 = DataFrame(:t => sol_case1[:t], :actual => sol_case1[model_case1.vl.Psi])
dfr_case1 = try CSV.read(joinpath(snapshotsdir, "ElectricalComponents.Analog.Basic.Tests.VariableInductor_case1_sig2.ref"), DataFrame); catch e; nothing; end
plt = plot(sol_case1, idxs=[model_case1.vl.Psi], width=2, label="Actual value of vl.Psi")
if !isnothing(dfr_case1)
scatter!(plt, dfr_case1.t, dfr_case1.expected, mc=:red, ms=3, label="Expected value of vl.Psi")
end<< @setup-block not executed in draft mode >>julia
plt<< @example-block not executed in draft mode >>Related
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