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Analog.Basic.Tests.CCV.md

Analog.Basic.Tests.CCV ​

Test circuit for CCV (current-controlled voltage source).

A sine voltage source (amplitude=1 V, frequency=1 Hz) drives a 5 Ω series resistor into the CCV input port (port 1). Since v1=0, the full source voltage drops across the resistor, producing i1 = V_source/R_series. A 10 Ω resistor loads the output port (port 2). CCV transResistance = 20 Ω.

Expected (algebraic, holds for all t):

  • v1 = 0 (zero input impedance)

  • i1 = sin(2π·t)/5 = 0.2·sin(2π·t)

  • v2 = transResistance·i1 = 4·sin(2π·t)

  • i2 = −v2/R_load = −0.4·sin(2π·t)

Usage ​

ElectricalComponents.Analog.Basic.Tests.CCV()

Behavior ​

julia
using ElectricalComponents #hide
using ModelingToolkit #hide
@named sys = ElectricalComponents.Analog.Basic.Tests.CCV() #hide
full_equations(sys) #hide
<< @example-block not executed in draft mode >>

Source ​

dyad
"""
Test circuit for CCV (current-controlled voltage source).

A sine voltage source (amplitude=1 V, frequency=1 Hz) drives a 5 Ω series
resistor into the CCV input port (port 1). Since v1=0, the full source
voltage drops across the resistor, producing i1 = V_source/R_series.
A 10 Ω resistor loads the output port (port 2).
CCV transResistance = 20 Ω.

Expected (algebraic, holds for all t):
- v1 = 0  (zero input impedance)
- i1 = sin(2π·t)/5 = 0.2·sin(2π·t)
- v2 = transResistance·i1 = 4·sin(2π·t)
- i2 = −v2/R_load = −0.4·sin(2π·t)
"""
test component CCV
  "Sine signal: amplitude=1, frequency=1 Hz"
  sine = BlockComponents.Sources.Sine(amplitude = 1, frequency = 1) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 0, "y1": 310, "x2": 100, "y2": 410, "rot": 0}
      },
      "tags": []
    }
  }
  "Input voltage source"
  vs = ElectricalComponents.Analog.Sources.VoltageSource() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 160, "y1": 410, "x2": 260, "y2": 310, "rot": 90}
      },
      "tags": []
    }
  }
  "Series resistor to convert voltage to current"
  r_series = ElectricalComponents.Analog.Basic.Resistor(R = 5) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 310, "y1": 200, "x2": 410, "y2": 300, "rot": 0}
      },
      "tags": []
    }
  }
  "CCV with transResistance=20 Ω"
  ccv = ElectricalComponents.Analog.Basic.CCV(transResistance = 20) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 510, "y1": 320, "x2": 610, "y2": 420, "rot": 0}
      },
      "tags": []
    }
  }
  "Output load resistor"
  r_load = ElectricalComponents.Analog.Basic.Resistor(R = 10) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 790, "y1": 410, "x2": 890, "y2": 310, "rot": 90}
      },
      "tags": []
    }
  }
  "Input-side ground"
  gnd1 = ElectricalComponents.Analog.Basic.Ground() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 160, "y1": 580, "x2": 260, "y2": 680, "rot": 0}
      },
      "tags": []
    }
  }
  "Output-side ground"
  gnd2 = ElectricalComponents.Analog.Basic.Ground() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 580, "y1": 590, "x2": 680, "y2": 690, "rot": 0}
      },
      "tags": []
    }
  }
relations
  connect(sine.y, vs.V) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
  connect(vs.p, r_series.p) {
    "Dyad": {
      "edges": [{"S": 1, "M": [{"x": 210, "y": 250}, {"x": 310, "y": 250}], "E": 2}],
      "renderStyle": "standard"
    }
  }
  connect(r_series.n, ccv.p1) {
    "Dyad": {
      "edges": [{"S": 1, "M": [{"x": 460, "y": 250}, {"x": 460, "y": 321}], "E": 2}],
      "renderStyle": "standard"
    }
  }
  connect(vs.n, gnd1.g) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
  connect(vs.n, ccv.n1) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [
            {"x": 210, "y": 470},
            {"x": 450, "y": 470},
            {"x": 450, "y": 420},
            {"x": 511, "y": 420}
          ],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(ccv.p2, r_load.p) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [
            {"x": 611, "y": 320},
            {"x": 680, "y": 320},
            {"x": 680, "y": 250},
            {"x": 840, "y": 250}
          ],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(r_load.n, ccv.n2) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [{"x": 840, "y": 470}, {"x": 631, "y": 470}, {"x": 631, "y": 420}],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(gnd2.g, ccv.n2) {
    "Dyad": {
      "renderStyle": "standard",
      "edges": [{"S": 1, "M": [{"x": 630, "y": 420}], "E": 2}]
    }
  }
metadata {
  "Dyad": {
    "icons": {"default": "dyad://ElectricalComponents/Example.svg"},
    "tests": {
      "case1": {"stop": 1, "expect": {"signals": ["ccv.v1", "ccv.v2", "ccv.i1", "ccv.i2"]}}
    }
  }
}
end
Flattened Source
dyad
"""
Test circuit for CCV (current-controlled voltage source).

A sine voltage source (amplitude=1 V, frequency=1 Hz) drives a 5 Ω series
resistor into the CCV input port (port 1). Since v1=0, the full source
voltage drops across the resistor, producing i1 = V_source/R_series.
A 10 Ω resistor loads the output port (port 2).
CCV transResistance = 20 Ω.

Expected (algebraic, holds for all t):
- v1 = 0  (zero input impedance)
- i1 = sin(2π·t)/5 = 0.2·sin(2π·t)
- v2 = transResistance·i1 = 4·sin(2π·t)
- i2 = −v2/R_load = −0.4·sin(2π·t)
"""
test component CCV
  "Sine signal: amplitude=1, frequency=1 Hz"
  sine = BlockComponents.Sources.Sine(amplitude = 1, frequency = 1) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 0, "y1": 310, "x2": 100, "y2": 410, "rot": 0}
      },
      "tags": []
    }
  }
  "Input voltage source"
  vs = ElectricalComponents.Analog.Sources.VoltageSource() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 160, "y1": 410, "x2": 260, "y2": 310, "rot": 90}
      },
      "tags": []
    }
  }
  "Series resistor to convert voltage to current"
  r_series = ElectricalComponents.Analog.Basic.Resistor(R = 5) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 310, "y1": 200, "x2": 410, "y2": 300, "rot": 0}
      },
      "tags": []
    }
  }
  "CCV with transResistance=20 Ω"
  ccv = ElectricalComponents.Analog.Basic.CCV(transResistance = 20) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 510, "y1": 320, "x2": 610, "y2": 420, "rot": 0}
      },
      "tags": []
    }
  }
  "Output load resistor"
  r_load = ElectricalComponents.Analog.Basic.Resistor(R = 10) {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 790, "y1": 410, "x2": 890, "y2": 310, "rot": 90}
      },
      "tags": []
    }
  }
  "Input-side ground"
  gnd1 = ElectricalComponents.Analog.Basic.Ground() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 160, "y1": 580, "x2": 260, "y2": 680, "rot": 0}
      },
      "tags": []
    }
  }
  "Output-side ground"
  gnd2 = ElectricalComponents.Analog.Basic.Ground() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 580, "y1": 590, "x2": 680, "y2": 690, "rot": 0}
      },
      "tags": []
    }
  }
relations
  connect(sine.y, vs.V) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
  connect(vs.p, r_series.p) {
    "Dyad": {
      "edges": [{"S": 1, "M": [{"x": 210, "y": 250}, {"x": 310, "y": 250}], "E": 2}],
      "renderStyle": "standard"
    }
  }
  connect(r_series.n, ccv.p1) {
    "Dyad": {
      "edges": [{"S": 1, "M": [{"x": 460, "y": 250}, {"x": 460, "y": 321}], "E": 2}],
      "renderStyle": "standard"
    }
  }
  connect(vs.n, gnd1.g) {"Dyad": {"edges": [{"S": 1, "M": [], "E": 2}], "renderStyle": "standard"}}
  connect(vs.n, ccv.n1) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [
            {"x": 210, "y": 470},
            {"x": 450, "y": 470},
            {"x": 450, "y": 420},
            {"x": 511, "y": 420}
          ],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(ccv.p2, r_load.p) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [
            {"x": 611, "y": 320},
            {"x": 680, "y": 320},
            {"x": 680, "y": 250},
            {"x": 840, "y": 250}
          ],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(r_load.n, ccv.n2) {
    "Dyad": {
      "edges": [
        {
          "S": 1,
          "M": [{"x": 840, "y": 470}, {"x": 631, "y": 470}, {"x": 631, "y": 420}],
          "E": 2
        }
      ],
      "renderStyle": "standard"
    }
  }
  connect(gnd2.g, ccv.n2) {
    "Dyad": {
      "renderStyle": "standard",
      "edges": [{"S": 1, "M": [{"x": 630, "y": 420}], "E": 2}]
    }
  }
metadata {
  "Dyad": {
    "icons": {"default": "dyad://ElectricalComponents/Example.svg"},
    "tests": {
      "case1": {"stop": 1, "expect": {"signals": ["ccv.v1", "ccv.v2", "ccv.i1", "ccv.i2"]}}
    }
  }
}
end


Test Cases ​

julia
using ElectricalComponents
using DyadInterface: TransientAnalysis, rebuild_sol, ODEAlg
using ModelingToolkit: toggle_namespacing, get_initial_conditions, @named
using CSV, DataFrames, Plots

snapshotsdir = joinpath(dirname(dirname(pathof(ElectricalComponents))), "test", "snapshots")
<< @setup-block not executed in draft mode >>

Test Case case1 ​

julia
@named model_case1 = ElectricalComponents.Analog.Basic.Tests.CCV()
model_case1 = toggle_namespacing(model_case1, false)

model_case1 = toggle_namespacing(model_case1, true)
result_case1 = TransientAnalysis(; model = model_case1, alg = ODEAlg.Auto(), start = 0e+0, stop = 1e+0, abstol=1e-6, reltol=1e-6)
sol_case1 = rebuild_sol(result_case1)
<< @setup-block not executed in draft mode >>
julia
df_case1 = DataFrame(:t => sol_case1[:t], :actual => sol_case1[model_case1.ccv.v1])
dfr_case1 = try CSV.read(joinpath(snapshotsdir, "ElectricalComponents.Analog.Basic.Tests.CCV_case1_sig0.ref"), DataFrame); catch e; nothing; end
plt = plot(sol_case1, idxs=[model_case1.ccv.v1], width=2, label="Actual value of ccv.v1")
if !isnothing(dfr_case1)
  scatter!(plt, dfr_case1.t, dfr_case1.expected, mc=:red, ms=3, label="Expected value of ccv.v1")
end
<< @setup-block not executed in draft mode >>
julia
plt
<< @example-block not executed in draft mode >>
julia
df_case1 = DataFrame(:t => sol_case1[:t], :actual => sol_case1[model_case1.ccv.v2])
dfr_case1 = try CSV.read(joinpath(snapshotsdir, "ElectricalComponents.Analog.Basic.Tests.CCV_case1_sig1.ref"), DataFrame); catch e; nothing; end
plt = plot(sol_case1, idxs=[model_case1.ccv.v2], width=2, label="Actual value of ccv.v2")
if !isnothing(dfr_case1)
  scatter!(plt, dfr_case1.t, dfr_case1.expected, mc=:red, ms=3, label="Expected value of ccv.v2")
end
<< @setup-block not executed in draft mode >>
julia
plt
<< @example-block not executed in draft mode >>
julia
df_case1 = DataFrame(:t => sol_case1[:t], :actual => sol_case1[model_case1.ccv.i1])
dfr_case1 = try CSV.read(joinpath(snapshotsdir, "ElectricalComponents.Analog.Basic.Tests.CCV_case1_sig2.ref"), DataFrame); catch e; nothing; end
plt = plot(sol_case1, idxs=[model_case1.ccv.i1], width=2, label="Actual value of ccv.i1")
if !isnothing(dfr_case1)
  scatter!(plt, dfr_case1.t, dfr_case1.expected, mc=:red, ms=3, label="Expected value of ccv.i1")
end
<< @setup-block not executed in draft mode >>
julia
plt
<< @example-block not executed in draft mode >>
julia
df_case1 = DataFrame(:t => sol_case1[:t], :actual => sol_case1[model_case1.ccv.i2])
dfr_case1 = try CSV.read(joinpath(snapshotsdir, "ElectricalComponents.Analog.Basic.Tests.CCV_case1_sig3.ref"), DataFrame); catch e; nothing; end
plt = plot(sol_case1, idxs=[model_case1.ccv.i2], width=2, label="Actual value of ccv.i2")
if !isnothing(dfr_case1)
  scatter!(plt, dfr_case1.t, dfr_case1.expected, mc=:red, ms=3, label="Expected value of ccv.i2")
end
<< @setup-block not executed in draft mode >>
julia
plt
<< @example-block not executed in draft mode >>