Sampler Icon
Sampler
Clock-agnostic sampler block.
Samples the continuous-time input signal u onto the clock of the output y, so that y takes the value of u at every tick of that clock. The clock of y is inferred from the discrete-time context that y is connected to; the block declares no sample interval of its own.
Before the clock of y has ticked, y equals initial_condition.
Usage
DiscreteComponents.Sampler(initial_condition=0)
Parameters:
| Name | Description | Units | Default value |
|---|---|---|---|
initial_condition | The value of y before the clock of y has ticked | – | 0 |
Connectors
u- This connector represents a real signal as an input to a component (RealInput)y- This connector represents a real signal as an output from a component (RealOutput)
Behavior
Behavior of this component cannot be rendered because it includes path variables.
Source
"""
Clock-agnostic sampler block.
Samples the continuous-time input signal `u` onto the clock of the output `y`, so that
`y` takes the value of `u` at every tick of that clock. The clock of `y` is inferred
from the discrete-time context that `y` is connected to; the block declares no sample
interval of its own.
Before the clock of `y` has ticked, `y` equals `initial_condition`.
"""
component Sampler@[input inclk extends Continuous, input outclk extends Discrete]
"The continuous-time input signal"
u = RealInput@[inclk]() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": -40, "y1": 450, "x2": 60, "y2": 550, "rot": 0}
},
"tags": []
}
}
"The sampled, clocked output signal"
y = RealOutput@[outclk]() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 960, "y1": 450, "x2": 1060, "y2": 550, "rot": 0}
},
"tags": []
}
}
"The value of `y` before the clock of `y` has ticked"
parameter initial_condition::Real = 0
relations
y@outclk = sample(u)
initial sample(u) = initial_condition
metadata {
"Dyad": {
"icons": {"default": "dyad://DiscreteComponents/Sampler.svg"},
"doc": {"behavior": false}
}
}
end
Flattened Source
"""
Clock-agnostic sampler block.
Samples the continuous-time input signal `u` onto the clock of the output `y`, so that
`y` takes the value of `u` at every tick of that clock. The clock of `y` is inferred
from the discrete-time context that `y` is connected to; the block declares no sample
interval of its own.
Before the clock of `y` has ticked, `y` equals `initial_condition`.
"""
component Sampler
"The continuous-time input signal"
u = RealInput@[inclk]() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": -40, "y1": 450, "x2": 60, "y2": 550, "rot": 0}
},
"tags": []
}
}
"The sampled, clocked output signal"
y = RealOutput@[outclk]() {
"Dyad": {
"placement": {
"diagram": {"iconName": "default", "x1": 960, "y1": 450, "x2": 1060, "y2": 550, "rot": 0}
},
"tags": []
}
}
"The value of `y` before the clock of `y` has ticked"
parameter initial_condition::Real = 0
relations
y@outclk = sample(u)
initial sample(u) = initial_condition
metadata {
"Dyad": {
"icons": {"default": "dyad://DiscreteComponents/Sampler.svg"},
"doc": {"behavior": false}
}
}
endTest Cases
No test cases defined.