DiscreteSlewRateLimiter

Discrete-time slew rate limiter that limits the rate of change of the input signal.

Note: the sample interval is not taken into account when computing the rate of change, the difference between two consecutive samples is saturated.

The initial condition is selected through the initialization enum. The state of the limiter is the previous output sample:

• InitialOutput(y0=...): the previous output is chosen such that the first output equals y0, given the first input sample.
• SteadyState: the previous output equals the first input sample, so the limiter starts in equilibrium (the first output equals the first input).
• InitialState(x0=...): the previous output sample is set to x0.

Usage

DiscreteComponents.DiscreteSlewRateLimiter(rate=1.0, rate_negative=rate)

Parameters:

Connectors

• u - This connector represents a real signal as an input to a component (RealInput)
• y - This connector represents a real signal as an output from a component (RealOutput)

Variables

Behavior

using DiscreteComponents #hide
using ModelingToolkit #hide
@variables rate #hide
@variables rate_negative #hide
@named sys = DiscreteComponents.DiscreteSlewRateLimiter(rate=rate, rate_negative=rate_negative) #hide
full_equations(sys) #hide

Source

"""
Discrete-time slew rate limiter that limits the rate of change of the input signal.

Note: the sample interval is not taken into account when computing the rate of change, the difference between two consecutive samples is saturated.

The initial condition is selected through the `initialization` enum. The state of the limiter is the previous output sample:
- `InitialOutput(y0=...)`: the previous output is chosen such that the first output equals `y0`, given the first input sample.
- `SteadyState`: the previous output equals the first input sample, so the limiter starts in equilibrium (the first output equals the first input).
- `InitialState(x0=...)`: the previous output sample is set to `x0`.
"""
component DiscreteSlewRateLimiter@[input clk extends Discrete]
  "Input signal"
  u = RealInput@[clk]() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": -100, "y1": 450, "x2": 0, "y2": 550, "rot": 0}
      },
      "tags": []
    }
  }
  "Output signal (slew-rate limited version of the input)"
  y = RealOutput@[clk]() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 1000, "y1": 450, "x2": 1100, "y2": 550, "rot": 0}
      },
      "tags": []
    }
  }
  "Slew rate limit (in positive/increasing direction). Must be a positive number."
  parameter rate::Real = 1.0
  "Negative slew rate limit, defaults to `rate`. Must be a positive number."
  parameter rate_negative::Real = rate
  "Initial-condition specification"
  structural parameter initialization::InitialCondition = DiscreteComponents.InitialCondition.InitialOutput(y0 = 0.0)
  "Unsaturated rate of change"
  variable d::Real
relations
  d@clk = u@clk - y@(clk-1)
  y@clk = y@(clk-1) + clamp(d@clk, -rate_negative, rate)
  switch initialization
    case InitialOutput
      initial y@(clk-1) = ifelse(u@clk > initialization.y0, initialization.y0 - rate, ifelse(u@clk < initialization.y0, initialization.y0 + rate_negative, initialization.y0))
    case SteadyState
      initial y@(clk-1) = u@clk
    case InitialState
      initial y@(clk-1) = initialization.x0
  end
metadata {
  "Dyad": {"icons": {"default": "dyad://DiscreteComponents/DiscreteSlewRateLimiter.svg"}}
}
end

"""
Discrete-time slew rate limiter that limits the rate of change of the input signal.

Note: the sample interval is not taken into account when computing the rate of change, the difference between two consecutive samples is saturated.

The initial condition is selected through the `initialization` enum. The state of the limiter is the previous output sample:
- `InitialOutput(y0=...)`: the previous output is chosen such that the first output equals `y0`, given the first input sample.
- `SteadyState`: the previous output equals the first input sample, so the limiter starts in equilibrium (the first output equals the first input).
- `InitialState(x0=...)`: the previous output sample is set to `x0`.
"""
component DiscreteSlewRateLimiter
  "Input signal"
  u = RealInput@[clk]() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": -100, "y1": 450, "x2": 0, "y2": 550, "rot": 0}
      },
      "tags": []
    }
  }
  "Output signal (slew-rate limited version of the input)"
  y = RealOutput@[clk]() {
    "Dyad": {
      "placement": {
        "diagram": {"iconName": "default", "x1": 1000, "y1": 450, "x2": 1100, "y2": 550, "rot": 0}
      },
      "tags": []
    }
  }
  "Slew rate limit (in positive/increasing direction). Must be a positive number."
  parameter rate::Real = 1.0
  "Negative slew rate limit, defaults to `rate`. Must be a positive number."
  parameter rate_negative::Real = rate
  "Initial-condition specification"
  structural parameter initialization::InitialCondition = DiscreteComponents.InitialCondition.InitialOutput(y0 = 0.0)
  "Unsaturated rate of change"
  variable d::Real
relations
  d@clk = u@clk - y@(clk-1)
  y@clk = y@(clk-1) + clamp(d@clk, -rate_negative, rate)
  switch initialization
    case InitialOutput
      initial y@(clk-1) = ifelse(u@clk > initialization.y0, initialization.y0 - rate, ifelse(u@clk < initialization.y0, initialization.y0 + rate_negative, initialization.y0))
    case SteadyState
      initial y@(clk-1) = u@clk
    case InitialState
      initial y@(clk-1) = initialization.x0
  end
metadata {
  "Dyad": {"icons": {"default": "dyad://DiscreteComponents/DiscreteSlewRateLimiter.svg"}}
}
end

Test Cases

No test cases defined.

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